This invention pertains to a chroma-key live-video compositing circuit (CLCC) for combining one live-video image with a second live-video image to produce a mixed live-video image output in real time.
Exchange of video information between systems installed at different places has been regarded in recent years as a most important communication way to create a shared workspace between users. One such "face-to-face" communication system can be realized by installing at each place a multimedia computer that uses live-video images as a communication tool, and a video camera. The live-video images captured by the video cameras are exchanged and chroma-key composited. In other words, one live-video image captured by one video camera is mixed with a second live-video image captured by the other video camera. Such a communication technique is applicable in the field of presentation systems. For example, a live-video image of a hand of a person who is making presentation captured by a video camera is chroma-key composited with another live-video image played back from a device such as a VTR, thereby permitting the "hand" to point at any part of the reproduced live-video image.
FIG. 22 shows a conventional CLCC to be incorporated into a system with the above-described functions. The CLCC of FIG. 22 has the capability of combining a foreground live-video image (hereinafter called "Vb") with a background live-video image (hereinafter called "Va") to produce a mixed live-video image output (hereinafter called "Vout"). D-type flip-flops 901, 902, 903, 906 are shown in FIG. 22. The D-type flip-flops 901, 902, 903, 906 each hold and output their respective input data on the rising-edge of a clock signal (hereinafter called "CLK"). A condition-judging circuit 1 receives input data DataA and input data DataB. This condition-judging circuit 1 sends out a coincidence signal if DataA meets conditions described by DataB. In FIG. 22, the condition-judging circuit 1 is implemented by a comparator 21. The comparator 21, having two input terminals A and B and an output terminal Y, receives input data DataA at the input terminal A and input data DataB at the input terminal B and determines whether or not the value of DataA falls in a range defined by DataB. If the value of DataA is found to fall in such a range, then a coincidence signal of logical level "1" appears at the output terminal Y of the comparator 21, otherwise a signal of logical level "0" appears. A data selector 4, having two input terminals A and B, a selection signal input terminal S associated with the output terminal Y of the comparator 21, and an output terminal Y, receives an input signal A at the input terminal A, an input signal B at the input terminal B, and a selection signal S at the selection signal input terminal S. If the selection signal S (from the comparator 21)="0", then the input signal B is selected and appears at the output terminal Y of the data selector 4. On the other hand, if the selection signal S="1", then the input signal A is selected and appears at the output terminal Y of the data selector 4. In FIG. 22, "B(0)" means that S=0 results in causing the data selector 4 to select the input signal B, and "A(1)" means that S=1 results in causing the data selector 4 to select the input signal A. Dcon (i.e., the condition data) is fed to the comparator 21. The live-video image data Vb contains therein three primary color components (hereinafter called "RGB", R standing for red, G for green, and B for blue), each color component being represented by 8 bits of information. Correspondingly, the condition data Dcon of 48 bits is employed to determine a range of the value of the live-video image value by giving the upper limit of each of RGB (8 bits.times.3) and the lower limit of each of RGB (8 bits.times.3).
In synchronism with the CLK, the D-type flip-flop 901 receives the Va of FIG. 23 (i.e., the live-video image data of the buildings) pixel by pixel. The video data Va is displayed on the screen made up of 640.times.480 pixels, and each pixel consists of 8 bits of R, 8 bits of G, and 8 bits of B (that is, one pixel is formed by 24 bits). These 640.times.480 pixels are scanned as follows. The scanning starts with the uppermost scanning line, horizontally sweeping from left to right. Upon having reached the end of the uppermost scanning line, the scanning then goes down to the next scanning line. This second uppermost scanning line is likewise swept from left to right. Then the next scanning line is swept. Such continues until the bottom scanning line has been scanned. Thereafter the scanning goes back to where it was started. The D-type flip-flop 902 likewise receives the Vb of FIG. 23 (i.e., the live-video image of the hand with a "blue back" background) pixel by pixel, in synchronism with the CLK. Pixel data at the same scan positions are synchronously input.
The condition data Dcon is set to a key color of the "blue back" of Vb of FIG. 23. The D-type flip-flop 901, on the one hand, holds and outputs each pixel data of Va in synchronism with CLK. The D-type flip-flop 902, on the other hand, holds and outputs each pixel data of Vb in synchronism with CLK. The condition-judging circuit 1 sends out a signal of logical level "1", only when it receives pixel data describing the "blue back" of Vb. As a result, the D-type flip-flop 906, which has latched the output of the data selector 4, provides Vout of FIG. 23. As shown in FIG. 23, this Vout is an image as a result of superimposing or chroma-key compositing the "hand/arm" and the "shadow" of the "hand/arm" (these two images are out of the key color of the "blue back") with the "building".
As seen from the Vout of FIG. 23, the "buildings" are partly obscured by the "hand/arm" and the "shadow". In other words, a considerably great amount of video information fails to be conveyed. This may lead to a critical misunderstanding.